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Thursday, February 19, 2009

NEHALEM MICROARCHITECTURE

After Penryn and the 45nm Hi-k silicon technology introduction comes Intel’s next-generation microarchitecture (Nehalem) slated for initial production in 2008. By continuing to innovate at this rapid cadence, Intel will deliver enormous performance and energy efficiency gains in years to come, adding more performance features and capabilities for new and improved applications. Here are some new initial disclosures around our Nehalem microarchitecture:

• Dynamically scalable for leadership performance on demand with energy efficiency

o Dynamically managed cores, threads, cache, interfaces and power

o Leverages leading 4 instruction issue Intel® Core microarchitecture technology

o Simultaneous multi-threading (similar to Intel® Hyper-threading technology) returns to enhance performance and energy efficiency.

o Innovative new Intel® SSE4 and ATA instruction set architecture additions.

o Superior multi-level shared cache leverages Intel® Smart Cache technology.

o Leadership system and memory bandwidth.

o Performance enhanced dynamic power management.

• Design scalable for optimal price/performance/energy efficiency in each market segment.

o New system architecture for next-generation Intel processors and platforms.

o Scalable performance: 1 to 16+ threads, 1 to 8+ cores, scalable cache sizes.

o Scalable and configurable system interconnects and integrated memory controllers.

o High performance integrated graphics engine for client.

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